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Contact: Aaron Dubrow
adubrow@nsf.gov
703-292-4489
National Science Foundation

Placement of a Large Integrated Circuit, Spacers and Heat Map of Resource Allocation

Caption: The image on the right shows the physical placement of a large integrated circuit with logic gates in blue and 'packing peanuts' (spacers) in red. The 'heat maps' on the left show wiring congestion -- green and yellow show sparse connectivity, but red and purple show insufficient routing resources. Routing congestion is one of the manifestations of physical limits to computation. The progression of images illustrates how computer-aided design tools address routing congestion by revising circuit placement.

Credit: Myung-Chul Kim, Jin Hu, Igor L. Markov (University of Michigan)

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