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Georgia Tech focuses on experimental systems and computational sciences at SC09

Technical papers, leadership activities and a research showcase round out active presence at leading high-performance computing conference

The Georgia Institute of Technology, an emerging leader in high-performance computing research and education, will be showcasing scientific research at the technical edge at next week's SC09, the international conference on high-performance computing, networking, storage and analysis scheduled for Nov. 14-20, 2009, at the Oregon Convention Center in Portland, Oregon. An SC09 best paper nomination for work in computational biology, a new GPU based experimental HPC system in the works, and expert presence across a range of hardware, software and application domains are just some of the ways Georgia Tech will feature multidisciplinary, cross-industry research efforts focusing on computational scientific discovery and sustainable high-performance computing (HPC).

At Georgia Tech, we have a history of tackling new frontiers with the realities of future needs in mind," said Dr. Mark Allen, senior vice provost for Research and Innovation at Georgia Tech. "As we look to high-performance computing to drive advanced breakthroughs in science, health, energy and other industries, true leaders in this field will emerge only by rethinking current systems and developing new computational methods that address today's challenges with massive data processing and energy-efficiency. Georgia Tech welcomes SC09 attendees to visit our booth, meet our researchers, and observe our work to expand the capabilities of the computational science community."

The papers and presentations outlined below will feature leading-edge Georgia Tech research, including the recently announced NSF Track 2 award, new research grants under the NSF Industry & University Cooperative Research program, and numerous NSF PetaApps awards.

Technical papers, panels, poster sessions and Birds-of-a-Feather discussions featuring researchers from Georgia Tech include (activities held at the Oregon Convention Center unless otherwise noted):

• TECHNICAL PAPER: A Massively Parallel Adaptive Fast-Multipole Method on Heterogeneous Architectures (Best Paper Nominee) – presented on Tuesday, Nov. 17, from 3:30 p.m. – 4:30 p.m. in Room PB255
  Georgia Tech's George Biros, Ilya Lashuk, Aparna Chandramowlishwaran, Harper Langston, Tuan-Anh Nguyen, Rahul Sampath, Aashay Shringarpure, and Rich Vuduc are co-authors on this paper that presents new scalable algorithms and a new implementation of our kernel-independent fast multipole method, employing both distributed memory parallelism (via MPI) and shared memory/streaming parallelism (via GPU acceleration) to rapidly evaluate two-body non-oscillatory potentials.

• TECHNICAL PAPER: SCAMPI: A Scalable Cam-based Algorithm for Multiple Pattern Inspection – presented on Wednesday, Nov. 18, from 2:00 p.m. – 2:30 p.m. in Room PB255
  Georgia Tech's Virat Agarwal (joint appointment with IBM T.J. Watson Research Center) is a co-author on this paper that presents SCAMPI, a ground-breaking string searching algorithm that is fast, space-efficient, scalable and resilient to attacks.

• TECHNICAL PAPER: Age Based Scheduling for Asymmetric Multiprocessors – presented on Thursday, Nov. 19, from 2:30 p.m. – 3:00 p.m. in Room PB255
  Georgia Tech's Nagesh B. Lakshminarayana, Jaekyu Lee and Hyesoon Kim are co-authors on this paper that proposes a new policy, Age based scheduling, that improves scheduling multithreaded applications in asymmetric multiprocessors.

• PANEL: Preparing the World for Ubiquitous Parallelism – Friday, Nov. 20, from 10:30 a.m. – 12:00 p.m. in Room PB252
  Georgia Tech's Matthew Wolf will moderate a panel discussion, composed of a diverse set of industry and academic representatives, that presents and discusses the abstractions, models, and (re-)training necessary to move parallel programming into a broad audience.

• POSTER: Cellule: Lightweight Execution Environment for Virtualized Accelerators – presented on Tuesday, Nov. 17, from 5:15 p.m. – 7:00 p.m. in the Oregon Ballroom Lobby
  Georgia Tech's Vishakha Gupta, Priyanka Tembey, Ada Gavrilovska and Karsten Schwan present this poster that presents Cellule, which uses virtualization to create a high performance, low noise self-contained execution environments for the Cell processor.

• BIRDS-OF-A-FEATHER: Cray XMT Massively Multithreaded Architecture- Tuesday, Nov. 17, from 10:30 a.m. – 12:00 p.m. in the Roosevelt Conference Room, Doubletree Hotel
  Georgia Tech's David A. Bader, David Ediger,Karl Jiang, and Jason Riedy will participate in this Birds-of-a-Feather to discuss characterizing and analyzing massive Spatio-Temporal Interaction Networks and Graphs (STING)

• BIRDS-OF-A-FEATHER: Accelerating Discovery in Science and Engineering through Petascale Simulations and Analysis: The NSF PetaApps Program – Tuesday, Nov. 17, from 5:30 p.m. – 7 p.m. in Room D133-134
  Georgia Tech's David A. Bader and George Biros will participate in this Birds-of-a-Feather update on recently-awarded NSF PetaApps research projects.

• SC09 EDUCATION PROGRAM: "Think Parallel" broadcast – Wednesday, Nov. 18 at 3:00 p.m.
  Georgia Tech's Matthew Wolf will be featured in a "Think Parallel" web broadcast, a bi-weekly half-hour interview of experts in the education, government, and industry to explore how best to integrate parallel architectures, algorithms, and programming into the undergraduate computer science curriculum.

Georgia Tech researchers and staff will be on hand at Booth 132 to demonstrate and discuss the latest innovations in high-performance computing research. The Georgia Tech research display will feature updates on current research projects, video conversations with Georgia Tech experts in high performance computing, and an interactive display unlike any other – a virtual field trip to the world's largest aquarium, the Georgia Aquarium. Utilizing a high bandwidth (1Gbps) channel connecting the Aquarium to the SC09 show floor, visitors to the Georgia Tech booth will be able to interact with researchers, fish and other marine creatures live through this one-of-a-kind tradeshow experience.

• George Biros and Rich Vuduc, Computational Science and Engineering division, are members of the Technical Papers Applications Area Committee.

• George Biros is a member of the Doctoral Showcase Committee.

• Ada Gavrilovska, School of Computer Science, is a member of the Technical Papers Architecture/Network Area Committee.

• Jeffrey Vetter, joint appointment to Georgia Tech's Computer Science and Engineering division and the Oak Ridge National Laboratory, is a member of the Technical Papers Storage Area Committee.

• David A. Bader, Computational Science and Engineering division, is a member of the Posters Algorithms Committee.

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