[ Back to EurekAlert! ] Public release date: 19-May-2010
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Contact: Liz Ahlberg
eahlberg@illinois.edu
217-244-1073
University of Illinois at Urbana-Champaign

Semiconductor manufacturing technique holds promise for solar energy

IMAGE: Illinois researchers have developed a more efficient, lower-cost method of manufacturing compound semiconductors such as gallium arsenide for many electronic device applications, including solar cells. The research team, from the...

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CHAMPAIGN, Ill. Thanks to a new semiconductor manufacturing method pioneered at the University of Illinois, the future of solar energy just got brighter.

Although silicon is the industry standard semiconductor in most electronic devices, including the photovoltaic cells that solar panels use to convert sunlight into energy, it is hardly the most efficient material available. For example, the semiconductor gallium arsenide and related compound semiconductors offer nearly twice the efficiency as silicon in solar devices, yet they are rarely used in utility-scale applications because of their high manufacturing cost.

U. of I. professors John Rogers and Xiuling Li explored lower-cost ways to manufacture thin films of gallium arsenide that also allowed versatility in the types of devices they could be incorporated into. "If you can reduce substantially the cost of gallium arsenide and other compound semiconductors, then you could expand their range of applications," said Rogers, the Lee J. Flory Founder Chair in Engineering Innovation, and a professor of materials science and engineering and of chemistry.

Typically, gallium arsenide is deposited in a single thin layer on a small wafer. Either the desired device is made directly on the wafer, or the semiconductor-coated wafer is cut up into chips of the desired size. The Illinois group decided to deposit multiple layers of the material on a single wafer, creating a layered, "pancake" stack of gallium arsenide thin films.

IMAGE: This is a flexible array of gallium arsenide solar cells. Gallium arsenide and other compound semiconductors are more efficient than the more commonly used silicon.

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"If you grow 10 layers in one growth, you only have to load the wafer one time," said Li, a professor of electrical and computer engineering. "If you do this in 10 growths, loading and unloading with temperature ramp-up and ramp-down take a lot of time. If you consider what is required for each growth the machine, the preparation, the time, the people the overhead saving our approach offers is a significant cost reduction."

Next the researchers individually peel off the layers and transfer them. To accomplish this, the stacks alternate layers of aluminum arsenide with the gallium arsenide. Bathing the stacks in a solution of acid and an oxidizing agent dissolves the layers of aluminum arsenide, freeing the individual thin sheets of gallium arsenide. A soft stamp-like device picks up the layers, one at a time from the top down, for transfer to another substrate glass, plastic or silicon, depending on the application. Then the wafer can be reused for another growth.

"By doing this we can generate much more material more rapidly and more cost effectively," Rogers said. "We're creating bulk quantities of material, as opposed to just the thin single-layer manner in which it is typically grown."

Freeing the material from the wafer also opens the possibility of flexible, thin-film electronics made with gallium arsenide or other high-speed semiconductors. "To make devices that can conform but still retain high performance, that's significant," Li said.

In a paper to be published online May 20 in the journal Nature, the group describes its methods and demonstrates three types of devices using gallium arsenide chips manufactured in multilayer stacks: light sensors, high-speed transistors and solar cells. The authors also provide a detailed cost comparison.

IMAGE: A pile of gallium arsenide solar cells is manufactured in stacks and then peeled apart layer by layer. They can be integrated into a number of electronic devices.

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Another advantage of the multilayer technique is the release from area constraints, especially important for solar cells. As the layers are removed from the stack, they can be laid out side-by-side on another substrate to produce a much larger surface area, whereas the typical single-layer process limits area to the size of the wafer.

"For photovoltaics, you want large area coverage to catch as much sunlight as possible. In an extreme case we might grow enough layers to have 10 times the area of the conventional route," Rogers said.

"You really multiply the area coverage, and by a similar multiplier you reduce the cost, while at the same time eliminating the consumption of the wafer," he said.

Among the paper's co-authors are two scientists from Semprius Inc., a North Carolina-based startup company that is beginning to use this technique to manufacture solar cells. A shift from silicon-based panels to more efficient gallium arsenide models could make solar power a more cost-effective form of alternative energy.

Next, the group plans to explore more potential device applications and other semiconductor materials that could adapt to multilayer growth.

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The Department of Energy and National Science Foundation-funded team also includes U. of I. postdoctoral researchers Jongseung Yoon, Sungjin Jo and Inhwa Jung; students Ik Su Chun and Hoon-Sik Kin; and electrical and computer engineering professor James Coleman, along with Ungyu Paik, of Hanyang University in Seoul, and Semprius scientists Matthew Meitl and Etienne Menard.

Editor's note: To contact John Rogers, call 217-244-4979; e-mail jrogers@illinois.edu; Xiuling Li, 217-265-6354; email xiuling@illinois.edu.



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