Field Effect Transistor (IMAGE) Naval Research Laboratory Caption A locally etched back-gated field effect transistor (FET) structure with a deposited dielectric layer. Thick dielectric layers are highly susceptible to radiation induced charge build-up, which is known to cause threshold voltage shifts and increased leakage in metal-oxide semiconductor (MOS) devices. To mitigate these effects, the dielectric layer is locally etched in the active region of the back-gated FET. A gate dielectric material is then deposited (depicted in red) over the entire substrate. Credit U.S. Naval Research Laboratory Usage Restrictions None License Licensed content Disclaimer: AAAS and EurekAlert! are not responsible for the accuracy of news releases posted to EurekAlert! by contributing institutions or for the use of any information through the EurekAlert system.