Graphic Showing Structured Placement Used to Wring out Optimizations in Chip Layout (IMAGE)

U.S. National Science Foundation

Graphic Showing Structured Placement Used to Wring out Optimizations in Chip Layout

Caption

Advanced techniques such as 'structured placement,' shown here and developed by Markov's group, are currently being used to wring out optimizations in chip layout. Different circuit modules on an integrated circuit are shown in different colors. Algorithms for placement optimize both the locations and the shapes of modules; some nearby modules can be blended when this reduces the length of the connecting wires.

Credit

Jin Hu, Myung-Chul Kim, Igor L. Markov (University of Michigan)

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