Graphic Showing Structured Placement Used to Wring out Optimizations in Chip Layout (image) National Science Foundation Share Print E-Mail Caption Advanced techniques such as 'structured placement,' shown here and developed by Markov's group, are currently being used to wring out optimizations in chip layout. Different circuit modules on an integrated circuit are shown in different colors. Algorithms for placement optimize both the locations and the shapes of modules; some nearby modules can be blended when this reduces the length of the connecting wires. Credit Jin Hu, Myung-Chul Kim, Igor L. Markov (University of Michigan) Usage Restrictions None Share Print E-Mail Disclaimer: AAAS and EurekAlert! are not responsible for the accuracy of news releases posted to EurekAlert! by contributing institutions or for the use of any information through the EurekAlert system.