Silicon wafers destined to become photovoltaic (PV) cells can take a bruising through assembly lines, as they are oxidized, annealed, purified, diffused, etched, and layered to reach their destinies as efficient converters of the sun's rays into useful electricity.
All those refinements are too much for 5% to 10% of the costly wafers. They have micro-cracks left over from incomplete wafer preparation, which causes them to break on the conveyers or during cell fabrication.
Scientists at the U.S. Department of Energy's National Renewable Energy Laboratory (NREL) have developed an instrument that puts pressure on the wafers to find which ones are too fragile to make it through the manufacturing process -- and then kicks out those weak wafers before they go through their costly enhancement. NREL's Silicon Photovoltaic Wafer Screening System (SPWSS) is a cube-shaped furnace about 15 inches each side, and can be retrofitted into an assembly line.
The PV industry generated $82 billion in global revenues in 2010, producing 20.5 gigawatts of electricity from sunlight. Processing solar cells costs about 15 cents for each watt of potential energy, and the cells comprise about half the cost of an installed solar module. If a way can be found to eliminate the cost of the 5% to 10% of cells that are destined to fail before they're finished, potential annual savings run into the billions of dollars.
It's the kind of savings that can make the difference between a U.S. manufacturer winning or losing.
Wafer Screening System Simulates Manufacturing Stress
Close-up photo of a gray silicon wafer as it emerges from a grid-wired conveyer. Enlarge image
A PV wafer emerges from the Silicon Photovoltaic Wafer Screening System. This tool tests a pre-selection of wafers for high fracture strength, improving the yield of silicon solar cells by preventing breakage during cell fabrication.
Credit: Dennis Schroeder
NREL's Silicon Photovoltaic Wafer Screening System, developed by NREL scientist Bhushan Sopori with colleagues Prakash Basnyat and Peter Rupnowski, exposes a silicon wafer to thermal stress in the form of carefully calibrated high temperatures.
The process looks a lot like the toasting belt that turns a cold sub sandwich into a warm one. As each wafer passes through a narrow -- 15-millimeter -- high-intensity illumination zone, different strips of the wafer are exposed to the heat. That way, the stress travels through the wafer.
"We create a very high temperature peak," said Sopori, principal investigator for the SPWSS. "The idea is to create a thermal stress, like putting very hot water in a glass."
The temperature can be calibrated precisely -- most usefully by correlating it to the thickness of the wafer, because the thinner the wafer, the less stress it can withstand. Every manufacturer has different levels at which their wafers can break from stress, so the SPWSS can be calibrated precisely via computer to meet the needs of each solar cell maker.
The SPWSS is essentially a furnace shaped like a trapezoidal prism to narrow the focus of the light and increase its intensity. The ceramic sides of the furnace reflect the light to the intensity zone and ensure that almost no energy is wasted.
The lamps can be as hot as 1,800 degrees Celsius, but the hottest part of the wafer will feel about 500 degrees Celsius on its surface.
It's the rapid increase in thermal energy -- made possible by the geometry of the furnace and its highly reflective surfaces -- that causes the stress. While one 15-millimeter strip of the wafer is feeling 500 degrees Celsius of stress, the strip adjacent to it feels much cooler. The hot strip wants to expand, but the cool strip doesn't want any part of that. It's these competing forces that cause the stress. "Every micron of the wafer sees this thermal stress," Sopori said.
The micro-cracks or breaks that occasionally develop from the thermal stress mirror the stress that will happen to weak wafers as they go through the assembly process. The difference is that the thermal testing happens first, before the expensive coatings and layers are added to the wafers.
Inside the SPWSS is a reflective cavity that uses nearly 100% of the energy from the power source, wasting almost none of it. That keeps the energy costs down, bringing the total cost of operating the system to "some fraction of a penny per wafer," Sopori said.
Low-Cost Instrument Can Enhance U.S. Competitiveness
Close-up photo of a gray silicon wafer broken into several pieces of varying size as they emerge from a grid-wired conveyer. Enlarge image
This silicon wafer didn't survive the thermal stress applied to it by NREL's Silicon Photovoltaic Wafer Screening System. The pre-screening saves money because the wafer is rejected before expensive embellishments are applied to it in the process of being made into solar cells.
Credit: Dennis Schroeder
In recent years, the United States has lost a large portion of its global market share of PV production, from 42% in 1997 to merely 4% in 2011. Because of this trend, analysts who study the solar industry say it will take dramatic changes in solar cell materials and production to ensure that the most innovative and lowest cost PV technologies are manufactured in the United States.
The loss in revenue due to broken wafers -- which increases dramatically as the wafers move closer to completion -- is an important barrier to solar energy becoming cost competitive with other energy technologies. Manufacturers need better, less expensive ways to make the cells.
In a typical manufacturing facility, about 5 to 10 of every 100 wafers of 180-micron thickness break or otherwise fail. With the increased use of even thinner cells, breakage frequency is likely to grow. The PV industry typically does not prepare wafers in a way that can maintain their high mechanical strength. Even a suction cup that moves the wafers from one process to another can cause the micro-cracks that doom wafers to failure.
System Can Test up to 1,200 Wafers an Hour
Photo of a scientist standing with his left arm leaning against a silver-metallic instrument; the top half of the instrument is in the shape of a trapezoidal prism. Enlarge image
NREL scientist Bhushan Sopori stands beside the Silicon Photovoltaic Wafer Screening System, which puts thermal pressure on wafers to determine if they will survive the rigors of turning them into solar cells.
Credit: Dennis Schroeder
A system that can screen just a sampling of wafers doesn't tell manufacturers which wafers to use and which ones to toss.
The manual version of SPWSS screens 1,200 wafers an hour and costs $60,000. That's quick enough for most manufacturers to screen every wafer without slowing down their conveyers. The upgraded SPWSS-A automatically separates broken wafers and costs $100,000. The failed wafers are swept out and melted down to be processed again into boules of solar-grade silicon.
Building on Success of NREL's Optical Cavity Furnace
With the SPWSS, Sopori built on the success of his Optical Cavity Furnace, which uses optics to heat and purify solar cells at unmatched precision while sharply boosting the cells' efficiency. Sopori won an R&D 100 award in 2011 for the furnace, which encloses an array of lamps within a highly reflective chamber to achieve an unprecedented level of temperature uniformity.
Like the SPWSS, it mitigates energy loss by lining the cavity walls with super-insulating and highly reflective ceramics, and by using a complex optimal geometric design. The wafer itself absorbs what would otherwise be energy loss. Like a microwave oven, each furnace dissipates energy only on the target, not on the container. "The most efficient way to generate light for the Silicon Photovoltaic Wafer Screening System is to use it in conjunction with the Optical Cavity Furnace," Sopori said.
Learn more about NREL's work with silicon materials.
-- Bill Scanlon