Toward compact and efficient generative AI: SNU researchers demonstrate AI semiconductor integrating core image-generation functions

Seoul National University College of Engineering announced that a research team led by Professor Jong-Ho Lee of the Department of Electrical and Computer Engineering (former Minister of Science and ICT) has demonstrated, for the first time, an artificial intelligence semiconductor technology that integrates the core functions of generative AI into a single device platform based on ferroelectric memory.

This technology is significant as the first demonstration of implementing the two essential functions required for generative AI—random sampling and stable computation—within a single memory array.

The research team leveraged the property of ferroelectric memory*, which exhibits different electrical states depending on the applied voltage, to successfully implement both probabilistic sampling* using random telegraph noise (RTN) and deterministic computation* based on its ability to retain multiple electrical states even when power is turned off—all within a single platform.

* Ferroelectric: A special material capable of maintaining an internal electrical state even after the external electric field is removed, widely used in next-generation low-power memory semiconductors.

* Probabilistic sampling: A computational method that selects values based on probability among multiple possible outcomes; widely used in generative AI to produce varied outputs such as images or text.

* Deterministic computation: A conventional computing approach in which the same input always produces the same output.

The study was published in the prestigious international journal Nature Communications.

Generative AI has recently been rapidly expanding into various domains, including image generation, video synthesis, autonomous systems, and personalized content creation. However, implementing generative AI directly on semiconductor chips remains a significant challenge. Conventional AI semiconductors are primarily optimized for stable, deterministic computations such as classification and inference. In contrast, generative models additionally require probabilistic functions that sample random values from a latent space.

As a result, previous studies often separated probabilistic sampling and decoding into different devices or external software modules, leading to increased chip area, wiring complexity, power consumption, and latency. In particular, integrating both functions within a single memory-based hardware platform while maintaining compatibility with conventional CMOS processes and scalability has remained a difficult challenge.

To overcome these limitations, the research team focused on the voltage-dependent characteristics of hafnium oxide (HfO₂)-based ferroelectric memory. At higher voltage levels, strong random telegraph noise (RTN) emerges, enabling probabilistic sampling. At lower voltage levels, RTN is suppressed, allowing stable vector–matrix multiplication (VMM) computations based on non-volatile multi-level conductance states*. Through this approach, the team successfully proposed, for the first time, a strategy to implement both randomness and stability required for generative AI within a single memory array.

* Non-volatile multi-level conductance states: The ability to maintain multiple distinct electrical states even when power is off, enabling both data storage and stable computation within a single memory device.

This innovative technology is particularly meaningful in that it integrates sampling and decoding—previously separated functions in generative AI hardware—into a single ferroelectric memory-based platform. Notably, the same device can perform different roles depending on its operating regime without requiring additional external random number generators, thereby offering a pathway to improved integration density and power efficiency in future generative AI semiconductors.

The team experimentally validated the concept using a NOR-type ferroelectric memory array fabricated on a 6-inch wafer. By optimizing latent vector distributions through adjustments in voltage and sampling time, the system was applied to a variational autoencoder (VAE)* for image generation using the CelebA face dataset. The results demonstrated the capability to generate images reflecting diverse facial attributes. Furthermore, circuit-level validation confirmed that the generation performance remained stable even after approximately 100,000 repeated operations.

* Variational Autoencoder (VAE): A representative generative AI model that learns data features and generates new data such as images, speech, or text.

This study is considered a major milestone in generative AI hardware development, as it demonstrates that two previously separated functions can be integrated within a single ferroelectric memory-based device platform compatible with CMOS processes. The proposed AI semiconductor technology is expected to simultaneously improve both area and power efficiency in applications such as on-chip generative AI accelerators, neuromorphic systems, and low-power edge AI semiconductors.

In particular, the high compatibility of ferroelectric memory with existing semiconductor manufacturing processes opens up strong potential for scaling to large-scale generative AI hardware systems. The research team plans to further advance the technology toward real-time generative AI hardware by optimizing sampling speed, parallelism, array size, and peripheral circuitry.

Professor Jong-Ho Lee, who led the study, stated, “Achieving both probabilistic sampling and deterministic computation simultaneously is a key challenge in generative AI hardware. This work is significant in that it demonstrates these two functions can be realized within a single device platform by leveraging the voltage-dependent characteristics of ferroelectric memory.”

The paper’s lead authors, Ryun-Han Koo and Jonghyun Ko, are currently conducting research on memory semiconductors, hardware AI, and low-power neuromorphic systems as members of Professor Jong-Ho Lee’s research group at Seoul National University.

□ Introduction to the SNU College of Engineering

Seoul National University (SNU) founded in 1946 is the first national university in South Korea. The College of Engineering at SNU has worked tirelessly to achieve its goal of ‘fostering leaders for global industry and society.’ In 12 departments, 323 internationally recognized full-time professors lead the development of cutting-edge technology in South Korea and serving as a driving force for international development.